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612 lines
20 KiB
612 lines
20 KiB
/*
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* Copyright (c) 2015, Freescale Semiconductor, Inc.
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* Copyright 2016-2021 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include "fsl_i2c_edma.h"
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/* Component ID definition, used by tools. */
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#ifndef FSL_COMPONENT_ID
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#define FSL_COMPONENT_ID "platform.drivers.i2c_edma"
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#endif
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/*<! @breif Structure definition for i2c_master_edma_private_handle_t. The structure is private. */
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typedef struct _i2c_master_edma_private_handle
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{
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I2C_Type *base;
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i2c_master_edma_handle_t *handle;
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} i2c_master_edma_private_handle_t;
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/*! @brief i2c master DMA transfer state. */
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enum _i2c_master_dma_transfer_states
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{
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kIdleState = 0x0U, /*!< I2C bus idle. */
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kTransferDataState = 0x1U, /*!< 7-bit address check state. */
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};
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/*******************************************************************************
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* Prototypes
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******************************************************************************/
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/*!
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* @brief EDMA callback for I2C master EDMA driver.
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*
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* @param handle EDMA handler for I2C master EDMA driver
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* @param userData user param passed to the callback function
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*/
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static void I2C_MasterTransferCallbackEDMA(edma_handle_t *handle, void *userData, bool transferDone, uint32_t tcds);
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/*!
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* @brief Check and clear status operation.
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*
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* @param base I2C peripheral base address.
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* @param status current i2c hardware status.
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* @retval kStatus_Success No error found.
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* @retval kStatus_I2C_ArbitrationLost Transfer error, arbitration lost.
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* @retval kStatus_I2C_Nak Received Nak error.
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*/
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static status_t I2C_CheckAndClearError(I2C_Type *base, uint32_t status);
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/*!
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* @brief EDMA config for I2C master driver.
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*
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* @param base I2C peripheral base address.
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* @param handle pointer to i2c_master_edma_handle_t structure which stores the transfer state
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*/
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static void I2C_MasterTransferEDMAConfig(I2C_Type *base, i2c_master_edma_handle_t *handle);
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/*!
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* @brief Set up master transfer, send slave address and sub address(if any), wait until the
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* wait until address sent status return.
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*
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* @param base I2C peripheral base address.
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* @param handle pointer to i2c_master_edma_handle_t structure which stores the transfer state
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* @param xfer pointer to i2c_master_transfer_t structure
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*/
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static status_t I2C_InitTransferStateMachineEDMA(I2C_Type *base,
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i2c_master_edma_handle_t *handle,
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i2c_master_transfer_t *xfer);
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/*******************************************************************************
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* Variables
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******************************************************************************/
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/*<! Private handle only used for internally. */
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static i2c_master_edma_private_handle_t s_i2cEdmaPrivateHandle[FSL_FEATURE_SOC_I2C_COUNT];
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/*******************************************************************************
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* Codes
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******************************************************************************/
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static void I2C_MasterTransferCallbackEDMA(edma_handle_t *handle, void *userData, bool transferDone, uint32_t tcds)
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{
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i2c_master_edma_private_handle_t *i2cPrivateHandle = (i2c_master_edma_private_handle_t *)userData;
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status_t result = kStatus_Success;
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uint8_t tmpReg;
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size_t tmpdataSize;
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/* Disable DMA. */
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I2C_EnableDMA(i2cPrivateHandle->base, false);
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/* Send stop if kI2C_TransferNoStop flag is not asserted. */
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if (0U == (i2cPrivateHandle->handle->transfer.flags & (uint32_t)kI2C_TransferNoStopFlag))
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{
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if (i2cPrivateHandle->handle->transfer.direction == kI2C_Read)
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{
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/* Change to send NAK at the last byte. */
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i2cPrivateHandle->base->C1 |= I2C_C1_TXAK_MASK;
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/* Wait the last data to be received. */
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while (0U == (i2cPrivateHandle->base->S & (uint8_t)kI2C_TransferCompleteFlag))
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{
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}
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/* Send stop signal. */
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result = I2C_MasterStop(i2cPrivateHandle->base);
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/* Read the last data byte. */
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tmpReg = i2cPrivateHandle->base->D;
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tmpdataSize = i2cPrivateHandle->handle->transfer.dataSize;
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*(i2cPrivateHandle->handle->transfer.data + tmpdataSize - 1U) = tmpReg;
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}
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else
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{
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/* Wait the last data to be sent. */
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while (0U == (i2cPrivateHandle->base->S & (uint8_t)kI2C_TransferCompleteFlag))
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{
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}
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/* Send stop signal. */
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result = I2C_MasterStop(i2cPrivateHandle->base);
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}
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}
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else
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{
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if (i2cPrivateHandle->handle->transfer.direction == kI2C_Read)
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{
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/* Change to send NAK at the last byte. */
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i2cPrivateHandle->base->C1 |= I2C_C1_TXAK_MASK;
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/* Wait the last data to be received. */
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while (0U == (i2cPrivateHandle->base->S & (uint8_t)kI2C_TransferCompleteFlag))
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{
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}
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/* Change direction to send. */
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i2cPrivateHandle->base->C1 |= I2C_C1_TX_MASK;
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/* Read the last data byte. */
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tmpReg = i2cPrivateHandle->base->D;
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tmpdataSize = i2cPrivateHandle->handle->transfer.dataSize;
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*(i2cPrivateHandle->handle->transfer.data + tmpdataSize - 1U) = tmpReg;
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}
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}
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i2cPrivateHandle->handle->state = (uint8_t)kIdleState;
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if (NULL != i2cPrivateHandle->handle->completionCallback)
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{
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i2cPrivateHandle->handle->completionCallback(i2cPrivateHandle->base, i2cPrivateHandle->handle, result,
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i2cPrivateHandle->handle->userData);
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}
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}
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static status_t I2C_CheckAndClearError(I2C_Type *base, uint32_t status)
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{
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status_t result = kStatus_Success;
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/* Check arbitration lost. */
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if (0U != (status & (uint32_t)kI2C_ArbitrationLostFlag))
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{
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/* Clear arbitration lost flag. */
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base->S = (uint8_t)kI2C_ArbitrationLostFlag;
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result = kStatus_I2C_ArbitrationLost;
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}
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/* Check NAK */
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else if (0U != (status & (uint32_t)kI2C_ReceiveNakFlag))
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{
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result = kStatus_I2C_Nak;
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}
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else
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{
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/* Add this to fix MISRA C2012 rule15.7 issue: Empty else without comment. */
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}
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return result;
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}
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static status_t I2C_InitTransferStateMachineEDMA(I2C_Type *base,
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i2c_master_edma_handle_t *handle,
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i2c_master_transfer_t *xfer)
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{
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assert(NULL != handle);
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assert(NULL != xfer);
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status_t result = kStatus_Success;
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if (handle->state != (uint8_t)kIdleState)
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{
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return kStatus_I2C_Busy;
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}
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else
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{
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i2c_direction_t direction = xfer->direction;
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/* Init the handle member. */
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handle->transfer = *xfer;
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/* Save total transfer size. */
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handle->transferSize = xfer->dataSize;
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handle->state = (uint8_t)kTransferDataState;
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/* Clear all status before transfer. */
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I2C_MasterClearStatusFlags(base, (uint32_t)kClearFlags);
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/* Change to send write address when it's a read operation with command. */
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if ((xfer->subaddressSize > 0U) && (0U != (uint8_t)(xfer->direction == kI2C_Read)))
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{
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direction = kI2C_Write;
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}
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/* If repeated start is requested, send repeated start. */
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if (0U != (handle->transfer.flags & (uint32_t)kI2C_TransferRepeatedStartFlag))
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{
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result = I2C_MasterRepeatedStart(base, handle->transfer.slaveAddress, direction);
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}
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else /* For normal transfer, send start. */
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{
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result = I2C_MasterStart(base, handle->transfer.slaveAddress, direction);
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}
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if (kStatus_Success != result)
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{
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return result;
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}
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#if I2C_RETRY_TIMES != 0U
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uint32_t waitTimes = I2C_RETRY_TIMES;
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while ((0U == (base->S & (uint8_t)kI2C_IntPendingFlag)) && (0U != waitTimes))
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{
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waitTimes--;
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}
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if (waitTimes == 0U)
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{
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return kStatus_I2C_Timeout;
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}
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#else
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while (0U == (base->S & (uint8_t)kI2C_IntPendingFlag))
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{
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}
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#endif
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/* Check if there's transfer error. */
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result = I2C_CheckAndClearError(base, base->S);
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/* Return if error. */
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if (kStatus_Success != result)
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{
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if (result == kStatus_I2C_Nak)
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{
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result = kStatus_I2C_Addr_Nak;
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if (I2C_MasterStop(base) != kStatus_Success)
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{
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result = kStatus_I2C_Timeout;
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}
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if (NULL != handle->completionCallback)
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{
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(handle->completionCallback)(base, handle, result, handle->userData);
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}
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}
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return result;
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}
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/* Send subaddress. */
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if (0U != handle->transfer.subaddressSize)
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{
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do
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{
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/* Clear interrupt pending flag. */
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base->S = (uint8_t)kI2C_IntPendingFlag;
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handle->transfer.subaddressSize--;
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base->D = (uint8_t)((handle->transfer.subaddress) >> (8U * handle->transfer.subaddressSize));
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/* Wait until data transfer complete. */
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#if I2C_RETRY_TIMES != 0U
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waitTimes = I2C_RETRY_TIMES;
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while ((0U == (base->S & (uint8_t)kI2C_IntPendingFlag)) && (0U != waitTimes))
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{
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waitTimes--;
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}
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if (waitTimes == 0U)
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{
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return kStatus_I2C_Timeout;
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}
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#else
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while (0U == (base->S & (uint8_t)kI2C_IntPendingFlag))
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{
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}
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#endif
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/* Check if there's transfer error. */
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result = I2C_CheckAndClearError(base, base->S);
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if (0 != result)
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{
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return result;
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}
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} while (handle->transfer.subaddressSize > 0U);
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if (handle->transfer.direction == kI2C_Read)
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{
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/* Clear pending flag. */
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base->S = (uint8_t)kI2C_IntPendingFlag;
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/* Send repeated start and slave address. */
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result = I2C_MasterRepeatedStart(base, handle->transfer.slaveAddress, kI2C_Read);
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if (0 != result)
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{
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return result;
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}
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/* Wait until data transfer complete. */
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#if I2C_RETRY_TIMES != 0U
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waitTimes = I2C_RETRY_TIMES;
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while ((0U == (base->S & (uint8_t)kI2C_IntPendingFlag)) && (0U != waitTimes))
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{
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waitTimes--;
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}
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if (waitTimes == 0U)
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{
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return kStatus_I2C_Timeout;
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}
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#else
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while (0U == (base->S & (uint8_t)kI2C_IntPendingFlag))
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{
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}
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#endif
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/* Check if there's transfer error. */
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result = I2C_CheckAndClearError(base, base->S);
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if (0 != result)
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{
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return result;
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}
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}
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}
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/* Clear pending flag. */
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base->S = (uint8_t)kI2C_IntPendingFlag;
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}
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return result;
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}
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static void I2C_MasterTransferEDMAConfig(I2C_Type *base, i2c_master_edma_handle_t *handle)
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{
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edma_transfer_config_t transfer_config = {0};
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if (handle->transfer.direction == kI2C_Read)
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{
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transfer_config.srcAddr = (uint32_t)I2C_GetDataRegAddr(base);
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transfer_config.destAddr = (uint32_t)(handle->transfer.data);
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transfer_config.majorLoopCounts = (handle->transfer.dataSize - 1U);
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transfer_config.srcTransferSize = kEDMA_TransferSize1Bytes;
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transfer_config.srcOffset = 0;
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transfer_config.destTransferSize = kEDMA_TransferSize1Bytes;
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transfer_config.destOffset = 1;
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transfer_config.minorLoopBytes = 1;
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}
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else
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{
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transfer_config.srcAddr = ((uint32_t)handle->transfer.data + 1U);
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transfer_config.destAddr = (uint32_t)I2C_GetDataRegAddr(base);
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transfer_config.majorLoopCounts = (handle->transfer.dataSize - 1U);
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transfer_config.srcTransferSize = kEDMA_TransferSize1Bytes;
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transfer_config.srcOffset = 1;
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transfer_config.destTransferSize = kEDMA_TransferSize1Bytes;
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transfer_config.destOffset = 0;
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transfer_config.minorLoopBytes = 1;
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}
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/* Store the initially configured eDMA minor byte transfer count into the I2C handle */
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handle->nbytes = (uint8_t)(transfer_config.minorLoopBytes);
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(void)EDMA_SubmitTransfer(handle->dmaHandle, (const edma_transfer_config_t *)(uint32_t)&transfer_config);
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EDMA_StartTransfer(handle->dmaHandle);
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}
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/*!
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* brief Initializes the I2C handle which is used in transactional functions.
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*
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* param base I2C peripheral base address.
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* param handle A pointer to the i2c_master_edma_handle_t structure.
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* param callback A pointer to the user callback function.
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* param userData A user parameter passed to the callback function.
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* param edmaHandle eDMA handle pointer.
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*/
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void I2C_MasterCreateEDMAHandle(I2C_Type *base,
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i2c_master_edma_handle_t *handle,
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i2c_master_edma_transfer_callback_t callback,
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void *userData,
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edma_handle_t *edmaHandle)
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{
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assert(NULL != handle);
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assert(NULL != edmaHandle);
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uint32_t instance = I2C_GetInstance(base);
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/* Zero handle. */
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(void)memset(handle, 0, sizeof(*handle));
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/* Set the user callback and userData. */
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handle->completionCallback = callback;
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handle->userData = userData;
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/* Set the handle for EDMA. */
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handle->dmaHandle = edmaHandle;
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s_i2cEdmaPrivateHandle[instance].base = base;
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s_i2cEdmaPrivateHandle[instance].handle = handle;
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EDMA_SetCallback(edmaHandle, (edma_callback)I2C_MasterTransferCallbackEDMA, &s_i2cEdmaPrivateHandle[instance]);
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}
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/*!
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* brief Performs a master eDMA non-blocking transfer on the I2C bus.
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*
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* param base I2C peripheral base address.
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* param handle A pointer to the i2c_master_edma_handle_t structure.
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* param xfer A pointer to the transfer structure of i2c_master_transfer_t.
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* retval kStatus_Success Successfully completed the data transmission.
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* retval kStatus_I2C_Busy A previous transmission is still not finished.
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* retval kStatus_I2C_Timeout Transfer error, waits for a signal timeout.
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* retval kStatus_I2C_ArbitrationLost Transfer error, arbitration lost.
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* retval kStataus_I2C_Nak Transfer error, receive NAK during transfer.
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*/
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status_t I2C_MasterTransferEDMA(I2C_Type *base, i2c_master_edma_handle_t *handle, i2c_master_transfer_t *xfer)
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{
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assert(NULL != handle);
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assert(NULL != xfer);
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status_t result;
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uint8_t tmpReg;
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/* Disable dma xfer. */
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I2C_EnableDMA(base, false);
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/* Send address and command buffer(if there is), until senddata phase or receive data phase. */
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result = I2C_InitTransferStateMachineEDMA(base, handle, xfer);
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if (0 != result)
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{
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/* Send stop if received Nak. */
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if (result == kStatus_I2C_Nak)
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{
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if (I2C_MasterStop(base) != kStatus_Success)
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{
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result = kStatus_I2C_Timeout;
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}
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}
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/* Reset the state to idle state. */
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handle->state = (uint8_t)kIdleState;
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return result;
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}
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/* Configure dma transfer. */
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/* For i2c send, need to send 1 byte first to trigger the dma, for i2c read,
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need to send stop before reading the last byte, so the dma transfer size should
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be (xSize - 1). */
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if (handle->transfer.dataSize > 1U)
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{
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I2C_MasterTransferEDMAConfig(base, handle);
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if (handle->transfer.direction == kI2C_Read)
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{
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/* Change direction for receive. */
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base->C1 &= ~(uint8_t)(I2C_C1_TX_MASK | I2C_C1_TXAK_MASK);
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/* Read dummy to release the bus. */
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(void)base->D;
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/* Enabe dma transfer. */
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I2C_EnableDMA(base, true);
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}
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else
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{
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/* Enabe dma transfer. */
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I2C_EnableDMA(base, true);
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/* Send the first data. */
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base->D = *handle->transfer.data;
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}
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}
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else /* If transfer size is 1, use polling method. */
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{
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if (handle->transfer.direction == kI2C_Read)
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{
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tmpReg = base->C1;
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/* Change direction to Rx. */
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tmpReg &= ~(uint8_t)I2C_C1_TX_MASK;
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/* Configure send NAK */
|
|
tmpReg |= I2C_C1_TXAK_MASK;
|
|
|
|
base->C1 = tmpReg;
|
|
|
|
/* Read dummy to release the bus. */
|
|
(void)base->D;
|
|
}
|
|
else
|
|
{
|
|
base->D = *handle->transfer.data;
|
|
}
|
|
|
|
/* Wait until data transfer complete. */
|
|
#if I2C_RETRY_TIMES != 0U
|
|
uint32_t waitTimes = I2C_RETRY_TIMES;
|
|
while ((0U == (base->S & (uint8_t)kI2C_IntPendingFlag)) && (0U != waitTimes))
|
|
{
|
|
waitTimes--;
|
|
}
|
|
if (waitTimes == 0U)
|
|
{
|
|
return kStatus_I2C_Timeout;
|
|
}
|
|
#else
|
|
while (0U == (base->S & (uint8_t)kI2C_IntPendingFlag))
|
|
{
|
|
}
|
|
#endif
|
|
|
|
/* Clear pending flag. */
|
|
base->S = (uint8_t)kI2C_IntPendingFlag;
|
|
|
|
/* Send stop if kI2C_TransferNoStop flag is not asserted. */
|
|
if (0U == (handle->transfer.flags & (uint32_t)kI2C_TransferNoStopFlag))
|
|
{
|
|
result = I2C_MasterStop(base);
|
|
}
|
|
else
|
|
{
|
|
/* Change direction to send. */
|
|
base->C1 |= I2C_C1_TX_MASK;
|
|
}
|
|
|
|
/* Read the last byte of data. */
|
|
if (handle->transfer.direction == kI2C_Read)
|
|
{
|
|
tmpReg = base->D;
|
|
*handle->transfer.data = tmpReg;
|
|
}
|
|
|
|
/* Reset the state to idle. */
|
|
handle->state = (uint8_t)kIdleState;
|
|
}
|
|
|
|
return result;
|
|
}
|
|
|
|
/*!
|
|
* brief Gets a master transfer status during the eDMA non-blocking transfer.
|
|
*
|
|
* param base I2C peripheral base address.
|
|
* param handle A pointer to the i2c_master_edma_handle_t structure.
|
|
* param count A number of bytes transferred by the non-blocking transaction.
|
|
*/
|
|
status_t I2C_MasterTransferGetCountEDMA(I2C_Type *base, i2c_master_edma_handle_t *handle, size_t *count)
|
|
{
|
|
assert(NULL != handle->dmaHandle);
|
|
|
|
if (NULL == count)
|
|
{
|
|
return kStatus_InvalidArgument;
|
|
}
|
|
|
|
if ((uint8_t)kIdleState != handle->state)
|
|
{
|
|
*count = (handle->transferSize -
|
|
(uint32_t)handle->nbytes *
|
|
EDMA_GetRemainingMajorLoopCount(handle->dmaHandle->base, handle->dmaHandle->channel));
|
|
}
|
|
else
|
|
{
|
|
*count = handle->transferSize;
|
|
}
|
|
|
|
return kStatus_Success;
|
|
}
|
|
|
|
/*!
|
|
* brief Aborts a master eDMA non-blocking transfer early.
|
|
*
|
|
* param base I2C peripheral base address.
|
|
* param handle A pointer to the i2c_master_edma_handle_t structure.
|
|
*/
|
|
void I2C_MasterTransferAbortEDMA(I2C_Type *base, i2c_master_edma_handle_t *handle)
|
|
{
|
|
EDMA_AbortTransfer(handle->dmaHandle);
|
|
|
|
/* Disable dma transfer. */
|
|
I2C_EnableDMA(base, false);
|
|
|
|
/* Reset the state to idle. */
|
|
handle->state = (uint8_t)kIdleState;
|
|
}
|
|
|