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481 lines
15 KiB
481 lines
15 KiB
/*
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* Copyright (c) 2015, Freescale Semiconductor, Inc.
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* Copyright 2016-2020 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include "fsl_llwu.h"
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/* Component ID definition, used by tools. */
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#ifndef FSL_COMPONENT_ID
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#define FSL_COMPONENT_ID "platform.drivers.llwu"
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#endif
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#if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN)
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/*!
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* brief Sets the external input pin source mode.
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*
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* This function sets the external input pin source mode that is used
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* as a wake up source.
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*
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* param base LLWU peripheral base address.
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* param pinIndex A pin index to be enabled as an external wakeup source starting from 1.
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* param pinMode A pin configuration mode defined in the llwu_external_pin_modes_t.
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*/
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void LLWU_SetExternalWakeupPinMode(LLWU_Type *base, uint32_t pinIndex, llwu_external_pin_mode_t pinMode)
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{
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#if (defined(FSL_FEATURE_LLWU_REG_BITWIDTH) && (FSL_FEATURE_LLWU_REG_BITWIDTH == 32))
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volatile uint32_t *regBase;
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uint32_t regOffset;
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uint32_t reg;
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switch (pinIndex >> 4U)
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{
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case 0U:
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regBase = &base->PE1;
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break;
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#if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 16))
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case 1U:
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regBase = &base->PE2;
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break;
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#endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
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default:
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regBase = NULL;
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break;
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}
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if (NULL != regBase)
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{
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reg = *regBase;
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regOffset = ((pinIndex & 0x0FU) << 1U);
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reg &= LLWU_REG_VAL(~(3UL << regOffset));
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reg |= ((uint32_t)pinMode << regOffset);
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*regBase = reg;
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}
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#else
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volatile uint8_t *regBase;
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uint8_t regOffset;
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uint8_t reg;
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switch (pinIndex >> 2U)
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{
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case 0U:
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regBase = &base->PE1;
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break;
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case 1U:
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regBase = &base->PE2;
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break;
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#if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 8))
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case 2U:
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regBase = &base->PE3;
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break;
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#endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
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#if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 12))
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case 3U:
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regBase = &base->PE4;
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break;
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#endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
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#if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 16))
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case 4U:
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regBase = &base->PE5;
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break;
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#endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
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#if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 20))
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case 5U:
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regBase = &base->PE6;
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break;
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#endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
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#if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 24))
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case 6U:
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regBase = &base->PE7;
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break;
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#endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
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#if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 28))
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case 7U:
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regBase = &base->PE8;
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break;
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#endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
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default:
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regBase = NULL;
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break;
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}
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if (NULL != regBase)
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{
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reg = *regBase;
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regOffset = (uint8_t)((pinIndex & 0x03U) << 1U);
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reg &= LLWU_REG_VAL(~(3UL << regOffset));
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reg |= (uint8_t)((uint32_t)pinMode << regOffset);
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*regBase = reg;
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}
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#endif /* FSL_FEATURE_LLWU_REG_BITWIDTH == 32 */
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}
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/*!
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* brief Gets the external wakeup source flag.
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*
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* This function checks the external pin flag to detect whether the MCU is
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* woken up by the specific pin.
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*
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* param base LLWU peripheral base address.
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* param pinIndex A pin index, which starts from 1.
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* return True if the specific pin is a wakeup source.
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*/
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bool LLWU_GetExternalWakeupPinFlag(LLWU_Type *base, uint32_t pinIndex)
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{
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#if (defined(FSL_FEATURE_LLWU_REG_BITWIDTH) && (FSL_FEATURE_LLWU_REG_BITWIDTH == 32))
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return (0U != (base->PF & (1UL << pinIndex)));
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#else
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bool ret;
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volatile uint8_t *regBase;
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switch (pinIndex >> 3U)
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{
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#if (defined(FSL_FEATURE_LLWU_HAS_PF) && FSL_FEATURE_LLWU_HAS_PF)
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case 0U:
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regBase = &base->PF1;
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break;
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#if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 8))
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case 1U:
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regBase = &base->PF2;
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break;
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#endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
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#if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 16))
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case 2U:
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regBase = &base->PF3;
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break;
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#endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
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#if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 24))
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case 3U:
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regBase = &base->PF4;
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break;
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#endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
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#else
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case 0U:
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regBase = &base->F1;
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break;
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#if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 8))
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case 1U:
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regBase = &base->F2;
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break;
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#endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
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#if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 16))
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case 2U:
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regBase = &base->F3;
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break;
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#endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
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#if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 24))
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case 3U:
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regBase = &base->F4;
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break;
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#endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
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#endif /* FSL_FEATURE_LLWU_HAS_PF */
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default:
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regBase = NULL;
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break;
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}
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if (NULL != regBase)
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{
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if (0U != (*regBase & (1U << pinIndex % 8U)))
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{
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ret = true;
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}
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else
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{
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ret = false;
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}
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}
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else
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{
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ret = false;
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}
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return ret;
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#endif /* FSL_FEATURE_LLWU_REG_BITWIDTH */
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}
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/*!
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* brief Clears the external wakeup source flag.
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*
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* This function clears the external wakeup source flag for a specific pin.
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*
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* param base LLWU peripheral base address.
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* param pinIndex A pin index, which starts from 1.
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*/
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void LLWU_ClearExternalWakeupPinFlag(LLWU_Type *base, uint32_t pinIndex)
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{
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#if (defined(FSL_FEATURE_LLWU_REG_BITWIDTH) && (FSL_FEATURE_LLWU_REG_BITWIDTH == 32))
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base->PF = (1UL << pinIndex);
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#else
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volatile uint8_t *regBase;
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switch (pinIndex >> 3U)
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{
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#if (defined(FSL_FEATURE_LLWU_HAS_PF) && FSL_FEATURE_LLWU_HAS_PF)
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case 0U:
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regBase = &base->PF1;
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break;
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#if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 8))
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case 1U:
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regBase = &base->PF2;
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break;
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#endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
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#if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 16))
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case 2U:
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regBase = &base->PF3;
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break;
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#endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
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#if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 24))
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case 3U:
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regBase = &base->PF4;
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break;
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#endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
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#else
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case 0U:
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regBase = &base->F1;
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break;
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#if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 8))
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case 1U:
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regBase = &base->F2;
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break;
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#endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
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#if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 16))
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case 2U:
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regBase = &base->F3;
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break;
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#endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
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#if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 24))
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case 3U:
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regBase = &base->F4;
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break;
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#endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
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#endif /* FSL_FEATURE_LLWU_HAS_PF */
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default:
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regBase = NULL;
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break;
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}
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if (NULL != regBase)
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{
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*regBase = (1U << pinIndex % 8U);
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}
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#endif /* FSL_FEATURE_LLWU_REG_BITWIDTH */
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}
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#endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
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#if (defined(FSL_FEATURE_LLWU_HAS_PIN_FILTER) && FSL_FEATURE_LLWU_HAS_PIN_FILTER)
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/*!
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* brief Sets the pin filter configuration.
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*
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* This function sets the pin filter configuration.
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*
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* param base LLWU peripheral base address.
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* param filterIndex A pin filter index used to enable/disable the digital filter, starting from 1.
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* param filterMode A filter mode configuration
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*/
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void LLWU_SetPinFilterMode(LLWU_Type *base, uint32_t filterIndex, llwu_external_pin_filter_mode_t filterMode)
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{
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#if (defined(FSL_FEATURE_LLWU_REG_BITWIDTH) && (FSL_FEATURE_LLWU_REG_BITWIDTH == 32))
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uint32_t filt;
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uint32_t shiftInReg;
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if ((filterIndex > 0U) && (filterIndex <= (uint32_t)FSL_FEATURE_LLWU_HAS_PIN_FILTER))
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{
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shiftInReg = (filterIndex - 1U) * 8U;
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filt = base->FILT;
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/* Clean the W1C bits, in case the flags are cleared by mistake. */
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filt &= ~(((uint32_t)LLWU_FILT_FILTF1_MASK << 0U) | ((uint32_t)LLWU_FILT_FILTF1_MASK << 8U) |
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((uint32_t)LLWU_FILT_FILTF1_MASK << 16U) | ((uint32_t)LLWU_FILT_FILTF1_MASK << 24U));
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filt &= ~(((uint32_t)LLWU_FILT_FILTSEL1_MASK | (uint32_t)LLWU_FILT_FILTE1_MASK) << shiftInReg);
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filt |=
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((LLWU_FILT_FILTSEL1(filterMode.pinIndex) | LLWU_FILT_FILTE1(filterMode.filterMode) | LLWU_FILT_FILTF1_MASK)
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<< shiftInReg);
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base->FILT = filt;
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}
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#else
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volatile uint8_t *regBase;
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switch (filterIndex)
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{
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case 1U:
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regBase = &base->FILT1;
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break;
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#if (defined(FSL_FEATURE_LLWU_HAS_PIN_FILTER) && (FSL_FEATURE_LLWU_HAS_PIN_FILTER > 1))
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case 2U:
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regBase = &base->FILT2;
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break;
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#endif /* FSL_FEATURE_LLWU_HAS_PIN_FILTER */
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#if (defined(FSL_FEATURE_LLWU_HAS_PIN_FILTER) && (FSL_FEATURE_LLWU_HAS_PIN_FILTER > 2))
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case 3U:
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regBase = &base->FILT3;
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break;
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#endif /* FSL_FEATURE_LLWU_HAS_PIN_FILTER */
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#if (defined(FSL_FEATURE_LLWU_HAS_PIN_FILTER) && (FSL_FEATURE_LLWU_HAS_PIN_FILTER > 3))
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case 4U:
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regBase = &base->FILT4;
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break;
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#endif /* FSL_FEATURE_LLWU_HAS_PIN_FILTER */
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default:
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regBase = NULL;
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break;
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}
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if (NULL != regBase)
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{
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*regBase = (uint8_t)((*regBase & ~(LLWU_FILT1_FILTSEL_MASK | LLWU_FILT1_FILTE_MASK)) |
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LLWU_FILT1_FILTSEL(filterMode.pinIndex) | LLWU_FILT1_FILTE(filterMode.filterMode) |
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LLWU_FILT1_FILTF_MASK) /* W1C to clear the FILTF flag bit. */
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;
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}
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#endif /* FSL_FEATURE_LLWU_REG_BITWIDTH */
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}
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/*!
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* brief Gets the pin filter configuration.
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*
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* This function gets the pin filter flag.
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*
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* param base LLWU peripheral base address.
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* param filterIndex A pin filter index, which starts from 1.
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* return True if the flag is a source of the existing low-leakage power mode.
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*/
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bool LLWU_GetPinFilterFlag(LLWU_Type *base, uint32_t filterIndex)
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{
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#if (defined(FSL_FEATURE_LLWU_REG_BITWIDTH) && (FSL_FEATURE_LLWU_REG_BITWIDTH == 32))
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return (0U != (base->FILT & (1UL << (filterIndex * 8U - 1U))));
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#else
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bool status = false;
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switch (filterIndex)
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{
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case 1:
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status = ((base->FILT1 & LLWU_FILT1_FILTF_MASK) != 0U);
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break;
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#if (defined(FSL_FEATURE_LLWU_HAS_PIN_FILTER) && (FSL_FEATURE_LLWU_HAS_PIN_FILTER > 1))
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case 2:
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status = ((base->FILT2 & LLWU_FILT2_FILTF_MASK) != 0U);
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break;
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#endif /* FSL_FEATURE_LLWU_HAS_PIN_FILTER */
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#if (defined(FSL_FEATURE_LLWU_HAS_PIN_FILTER) && (FSL_FEATURE_LLWU_HAS_PIN_FILTER > 2))
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case 3:
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status = ((base->FILT3 & LLWU_FILT3_FILTF_MASK) != 0U);
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break;
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#endif /* FSL_FEATURE_LLWU_HAS_PIN_FILTER */
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#if (defined(FSL_FEATURE_LLWU_HAS_PIN_FILTER) && (FSL_FEATURE_LLWU_HAS_PIN_FILTER > 3))
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case 4:
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status = ((base->FILT4 & LLWU_FILT4_FILTF_MASK) != 0U);
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break;
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#endif /* FSL_FEATURE_LLWU_HAS_PIN_FILTER */
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default:
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status = false;
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break;
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}
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return status;
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#endif /* FSL_FEATURE_LLWU_REG_BITWIDTH */
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}
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/*!
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* brief Clears the pin filter configuration.
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*
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* This function clears the pin filter flag.
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*
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* param base LLWU peripheral base address.
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* param filterIndex A pin filter index to clear the flag, starting from 1.
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*/
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void LLWU_ClearPinFilterFlag(LLWU_Type *base, uint32_t filterIndex)
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{
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#if (defined(FSL_FEATURE_LLWU_REG_BITWIDTH) && (FSL_FEATURE_LLWU_REG_BITWIDTH == 32))
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#if (defined(FSL_FEATURE_LLWU_HAS_PIN_FILTER) && (FSL_FEATURE_LLWU_HAS_PIN_FILTER > 0))
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uint32_t reg;
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if ((filterIndex > 0U) && (filterIndex <= (uint32_t)FSL_FEATURE_LLWU_HAS_PIN_FILTER))
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{
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reg = base->FILT;
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/* Clean the W1C bits, in case the flags are cleared by mistake. */
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reg &= ~(((uint32_t)LLWU_FILT_FILTF1_MASK << 0U) | ((uint32_t)LLWU_FILT_FILTF1_MASK << 8U) |
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((uint32_t)LLWU_FILT_FILTF1_MASK << 16U) | ((uint32_t)LLWU_FILT_FILTF1_MASK << 24U));
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reg |= ((uint32_t)LLWU_FILT_FILTF1_MASK << ((filterIndex - 1U) * 8U));
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base->FILT = reg;
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}
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#endif
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return;
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#else
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volatile uint8_t *regBase;
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uint8_t reg;
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switch (filterIndex)
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{
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case 1:
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regBase = &base->FILT1;
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break;
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#if (defined(FSL_FEATURE_LLWU_HAS_PIN_FILTER) && (FSL_FEATURE_LLWU_HAS_PIN_FILTER > 1))
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case 2:
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regBase = &base->FILT2;
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break;
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#endif /* FSL_FEATURE_LLWU_HAS_PIN_FILTER */
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#if (defined(FSL_FEATURE_LLWU_HAS_PIN_FILTER) && (FSL_FEATURE_LLWU_HAS_PIN_FILTER > 2))
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case 3:
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regBase = &base->FILT3;
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break;
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#endif /* FSL_FEATURE_LLWU_HAS_PIN_FILTER */
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#if (defined(FSL_FEATURE_LLWU_HAS_PIN_FILTER) && (FSL_FEATURE_LLWU_HAS_PIN_FILTER > 3))
|
|
case 4:
|
|
regBase = &base->FILT4;
|
|
break;
|
|
#endif /* FSL_FEATURE_LLWU_HAS_PIN_FILTER */
|
|
default:
|
|
regBase = NULL;
|
|
break;
|
|
}
|
|
|
|
if (NULL != regBase)
|
|
{
|
|
reg = *regBase;
|
|
reg |= LLWU_FILT1_FILTF_MASK;
|
|
*regBase = reg;
|
|
}
|
|
#endif /* FSL_FEATURE_LLWU_REG_BITWIDTH */
|
|
}
|
|
#endif /* FSL_FEATURE_LLWU_HAS_PIN_FILTER */
|
|
|
|
#if (defined(FSL_FEATURE_LLWU_HAS_RESET_ENABLE) && FSL_FEATURE_LLWU_HAS_RESET_ENABLE)
|
|
/*!
|
|
* brief Sets the reset pin mode.
|
|
*
|
|
* This function determines how the reset pin is used as a low leakage mode exit source.
|
|
*
|
|
* param pinEnable Enable reset the pin filter
|
|
* param pinFilterEnable Specify whether the pin filter is enabled in Low-Leakage power mode.
|
|
*/
|
|
void LLWU_SetResetPinMode(LLWU_Type *base, bool pinEnable, bool pinFilterEnable)
|
|
{
|
|
uint8_t reg;
|
|
|
|
reg = base->RST;
|
|
|
|
reg &= (uint8_t)(~(LLWU_RST_LLRSTE_MASK | LLWU_RST_RSTFILT_MASK));
|
|
|
|
if (pinEnable)
|
|
{
|
|
reg |= LLWU_RST_LLRSTE_MASK;
|
|
}
|
|
|
|
if (pinFilterEnable)
|
|
{
|
|
reg |= LLWU_RST_RSTFILT_MASK;
|
|
}
|
|
|
|
base->RST = reg;
|
|
}
|
|
#endif /* FSL_FEATURE_LLWU_HAS_RESET_ENABLE */
|
|
|