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345 lines
16 KiB
345 lines
16 KiB
/*
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* Copyright (c) 2021, Erich Styger
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include "McuSWO.h"
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#if McuSWO_CONFIG_HAS_SWO
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#include "McuUtility.h"
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#include "McuShell.h"
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#include "board.h"
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#include "pin_mux.h"
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static uint32_t SWO_traceClock; /* clock feed into the ARM CoreSight */
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/*!
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* \brief Sends a character over the SWO channel
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* \param c Character to be sent
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* \param portNo SWO channel number, value in the range of 0 to 31
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*/
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void SWO_PrintChar(char c, uint8_t portNo) {
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volatile int timeout;
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/* Check if Trace Control Register (ITM->TCR at 0xE0000E80) is set */
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if ((ITM->TCR&ITM_TCR_ITMENA_Msk) == 0) { /* check Trace Control Register if ITM trace is enabled*/
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return; /* not enabled? */
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}
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/* Check if the requested channel stimulus port (ITM->TER at 0xE0000E00) is enabled */
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if ((ITM->TER & (1ul<<portNo))==0) { /* check Trace Enable Register if requested port is enabled */
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return; /* requested port not enabled? */
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}
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timeout = 5000; /* arbitrary timeout value */
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while (ITM->PORT[0].u32 == 0) {
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/* Wait until STIMx is ready, then send data */
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timeout--;
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if (timeout==0) {
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return; /* not able to send */
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}
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}
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ITM->PORT[0].u8 = c;
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}
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/*!
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* \brief Sends a string over SWO to the host
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* \param s String to send
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* \param portNumber Port number, 0-31, use 0 for normal debug strings
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*/
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void PrintString(const unsigned char *s, uint8_t portNumber) {
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while (*s!='\0') {
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//SWO_PrintChar(*s++, portNumber);
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ITM_SendChar(*s++);
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}
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}
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void McuSWO_SendStr(const unsigned char *str) {
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PrintString(str, McuSWO_CONFIG_TERMINAL_CHANNEL);
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}
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volatile int32_t ITM_RxBuffer; /* implementation of buffer for Rx */
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bool McuSWO_StdIOKeyPressed(void) {
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if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) {
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return true;
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}
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return false;
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}
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void McuSWO_StdIOReadChar(uint8_t *c) {
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int res;
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res = ITM_ReceiveChar();
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if (res==-1) { /* no character present */
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*c = '\0';
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} else {
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*c = (uint8_t)res; /* return character */
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}
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}
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void McuSWO_StdIOSendChar(uint8_t ch) {
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ITM_SendChar(ch);
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}
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/* default standard I/O struct */
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McuShell_ConstStdIOType McuSWO_stdio = {
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(McuShell_StdIO_In_FctType)McuSWO_StdIOReadChar, /* stdin */
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(McuShell_StdIO_OutErr_FctType)McuSWO_StdIOSendChar, /* stdout */
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(McuShell_StdIO_OutErr_FctType)McuSWO_StdIOSendChar, /* stderr */
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McuSWO_StdIOKeyPressed /* if input is not empty */
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};
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uint8_t McuSWO_DefaultShellBuffer[McuShell_DEFAULT_SHELL_BUFFER_SIZE]; /* default buffer which can be used by the application */
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static void MuxSWOPin(void) {
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#if McuLib_CONFIG_CPU_IS_LPC
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CLOCK_EnableClock(kCLOCK_Iocon);
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#if McuLib_CONFIG_CPU_VARIANT==McuLib_CONFIG_CPU_VARIANT_NXP_LPC55S16
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/* local settings copied from pin_mux.h: have them local here in case muxing is not done in Pins Tool */
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#define PIO0_10_FUNC_ALT6_SWO 0x06u
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#define PIO0_10_DIGIMODE_DIGITAL_SWO 0x01u
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IOCON->PIO[0][10] = ((IOCON->PIO[0][10] &
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/* Mask bits to zero which are setting */
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(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
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/* Selects pin function.
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* : PORT010 (pin 21) is configured as SWO. */
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| IOCON_PIO_FUNC(PIO0_10_FUNC_ALT6_SWO)
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/* Select Digital mode.
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* : Enable Digital mode.
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* Digital input is enabled. */
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| IOCON_PIO_DIGIMODE(PIO0_10_DIGIMODE_DIGITAL));
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#elif McuLib_CONFIG_CPU_VARIANT==McuLib_CONFIG_CPU_VARIANT_NXP_LPC55S69
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/* local settings copied from pin_mux.h: have them local here in case muxing is not done in Pins Tool */
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#define PIO0_10_FUNC_ALT6_SWO 0x06u
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#define PIO0_10_DIGIMODE_DIGITAL_SWO 0x01u
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IOCON->PIO[0][10] = ((IOCON->PIO[0][10] &
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/* Mask bits to zero which are setting */
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(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
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/* Selects pin function.
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* : PORT010 (pin 21) is configured as SWO. */
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| IOCON_PIO_FUNC(PIO0_10_FUNC_ALT6_SWO)
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/* Select Digital mode.
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* : Enable Digital mode.
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* Digital input is enabled. */
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| IOCON_PIO_DIGIMODE(PIO0_10_DIGIMODE_DIGITAL_SWO));
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#else
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#error "NYI"
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#endif
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#else
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#error "NYI"
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#endif
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}
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static void SetSWOSpeed(uint32_t traceClockHz, uint32_t SWOSpeed) {
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uint32_t SWOPrescaler = (traceClockHz / SWOSpeed) - 1; /* SWOSpeed in Hz, note that traceClockHz is expected to be match the CPU core clock */
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TPI->ACPR = SWOPrescaler; /* "Async Clock Prescaler Register". Scale the baud rate of the asynchronous output */
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}
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static void PrintRegHex(McuShell_ConstStdIOType *io, uint32_t regVal, const char *statusStr, const char *desc) {
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uint8_t buf[48];
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McuUtility_strcpy(buf, sizeof(buf), (unsigned char*)"0x");
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McuUtility_strcatNum32Hex(buf, sizeof(buf), regVal);
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McuUtility_strcat(buf, sizeof(buf), (unsigned char*)desc);
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McuShell_SendStatusStr((unsigned char*)statusStr, buf, io->stdOut);
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}
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static uint8_t PrintStatus(McuShell_ConstStdIOType *io) {
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uint8_t buf[72];
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McuShell_SendStatusStr((const unsigned char*)"McuSWO", (const unsigned char*)"McuSWO module status\r\n", io->stdOut);
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McuUtility_strcpy(buf, sizeof(buf), (unsigned char*)"traceClock: ");
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McuUtility_strcatNum32u(buf, sizeof(buf), SWO_traceClock);
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McuUtility_strcat(buf, sizeof(buf), (unsigned char*)" Hz, Baud: ");
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McuUtility_strcatNum32u(buf, sizeof(buf), SWO_traceClock/(TPI->ACPR+1));
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McuUtility_strcat(buf, sizeof(buf), (unsigned char*)"\r\n");
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McuShell_SendStatusStr((const unsigned char*)" Clocking", buf, io->stdOut);
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/* Core Debug */
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McuUtility_strcpy(buf, sizeof(buf), (unsigned char*)"0x");
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McuUtility_strcatNum32Hex(buf, sizeof(buf), CoreDebug->DEMCR);
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McuUtility_strcat(buf, sizeof(buf), (unsigned char*)" (DEMCR)\r\n");
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McuShell_SendStatusStr((const unsigned char*)" CoreDebug", buf, io->stdOut);
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McuShell_SendStatusStr((const unsigned char*)" DWT", (const unsigned char*)"Data Watchpoint and Trace\r\n", io->stdOut);
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/* DWT Trace Control register */
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PrintRegHex(io, DWT->CTRL, " CTRL", " (Control)\r\n");
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McuUtility_strcpy(buf, sizeof(buf), (unsigned char*)"0x");
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McuUtility_strcatNum8Hex(buf, sizeof(buf), (DWT->CTRL&DWT_CTRL_NUMCOMP_Msk)>>DWT_CTRL_NUMCOMP_Pos);
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McuUtility_strcat(buf, sizeof(buf), (unsigned char*)" NUMCOMP\r\n");
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McuShell_SendStatusStr((const unsigned char*)"", buf, io->stdOut);
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McuUtility_strcpy(buf, sizeof(buf), (unsigned char*)"0x");
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McuUtility_strcatNum8Hex(buf, sizeof(buf), (DWT->CTRL&DWT_CTRL_PCSAMPLENA_Msk)>>DWT_CTRL_PCSAMPLENA_Pos);
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McuUtility_strcat(buf, sizeof(buf), (unsigned char*)" PCSAMPLENA\r\n");
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McuShell_SendStatusStr((const unsigned char*)"", buf, io->stdOut);
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McuUtility_strcpy(buf, sizeof(buf), (unsigned char*)"0x");
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McuUtility_strcatNum8Hex(buf, sizeof(buf), (DWT->CTRL&DWT_CTRL_SYNCTAP_Msk)>>DWT_CTRL_SYNCTAP_Pos);
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McuUtility_strcat(buf, sizeof(buf), (unsigned char*)" SYNCTAP\r\n");
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McuShell_SendStatusStr((const unsigned char*)"", buf, io->stdOut);
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McuUtility_strcpy(buf, sizeof(buf), (unsigned char*)"0x");
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McuUtility_strcatNum8Hex(buf, sizeof(buf), (DWT->CTRL&DWT_CTRL_CYCTAP_Msk)>>DWT_CTRL_CYCTAP_Pos);
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McuUtility_strcat(buf, sizeof(buf), (unsigned char*)" CYCTAP\r\n");
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McuShell_SendStatusStr((const unsigned char*)"", buf, io->stdOut);
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McuUtility_strcpy(buf, sizeof(buf), (unsigned char*)"0x");
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McuUtility_strcatNum8Hex(buf, sizeof(buf), (DWT->CTRL&DWT_CTRL_POSTINIT_Msk)>>DWT_CTRL_POSTINIT_Pos);
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McuUtility_strcat(buf, sizeof(buf), (unsigned char*)" POSTINIT\r\n");
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McuShell_SendStatusStr((const unsigned char*)"", buf, io->stdOut);
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McuUtility_strcpy(buf, sizeof(buf), (unsigned char*)"0x");
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McuUtility_strcatNum8Hex(buf, sizeof(buf), (DWT->CTRL&DWT_CTRL_POSTPRESET_Msk)>>DWT_CTRL_POSTPRESET_Pos);
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McuUtility_strcat(buf, sizeof(buf), (unsigned char*)" POSTPRESET\r\n");
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McuShell_SendStatusStr((const unsigned char*)"", buf, io->stdOut);
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McuUtility_strcpy(buf, sizeof(buf), (unsigned char*)"0x");
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McuUtility_strcatNum8Hex(buf, sizeof(buf), (DWT->CTRL&DWT_CTRL_CYCCNTENA_Msk)>>DWT_CTRL_CYCCNTENA_Pos);
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McuUtility_strcat(buf, sizeof(buf), (unsigned char*)" CYCCNTENA\r\n");
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McuShell_SendStatusStr((const unsigned char*)"", buf, io->stdOut);
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/* ITM registers */
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McuShell_SendStatusStr((const unsigned char*)" ITM", (const unsigned char*)"Instrumentation Trace Macrocell\r\n", io->stdOut);
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PrintRegHex(io, ITM->TER, " TER", " (trace enable stimulus ports)\r\n");
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PrintRegHex(io, ITM->TPR, " TPR", " (trace privilege)\r\n");
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PrintRegHex(io, ITM->TCR, " TCR", " (trace control)\r\n");
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PrintRegHex(io, ITM->LSR, " LSR", " (lock status)\r\n");
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PrintRegHex(io, ITM->DEVARCH, " DEVARCH", " (device architecture, M33 only)\r\n");
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PrintRegHex(io, ITM->PID0, " PID0", " (peripheral identification 0)\r\n");
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PrintRegHex(io, ITM->PID1, " PID1", " (peripheral identification 1)\r\n");
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PrintRegHex(io, ITM->PID2, " PID2", " (peripheral identification 2)\r\n");
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PrintRegHex(io, ITM->PID3, " PID3", " (peripheral identification 3)\r\n");
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PrintRegHex(io, ITM->PID4, " PID4", " (peripheral identification 4)\r\n");
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PrintRegHex(io, ITM->PID5, " PID5", " (peripheral identification 5)\r\n");
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PrintRegHex(io, ITM->PID6, " PID6", " (peripheral identification 6)\r\n");
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PrintRegHex(io, ITM->PID7, " PID8", " (peripheral identification 7)\r\n");
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PrintRegHex(io, ITM->CID0, " CID0", " (component identification 0)\r\n");
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PrintRegHex(io, ITM->CID1, " CID1", " (component identification 1)\r\n");
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PrintRegHex(io, ITM->CID2, " CID2", " (component identification 2)\r\n");
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PrintRegHex(io, ITM->CID3, " CID3", " (component identification 3)\r\n");
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/* TPI: Trace Port Interface */
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McuShell_SendStatusStr((const unsigned char*)" TPI", (const unsigned char*)"Trace Port Interface\r\n", io->stdOut);
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PrintRegHex(io, TPI->SSPSR, " SSPSR", " (Supported Parallel Port Size)\r\n");
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PrintRegHex(io, TPI->CSPSR, " CSPSR", " (Current Parallel Port Size)\r\n");
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PrintRegHex(io, TPI->ACPR, " ACPR", " (Asynchronous Clock Prescaler)\r\n");
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PrintRegHex(io, TPI->SPPR, " SPPR", " (Selected Pin Protocol)\r\n");
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PrintRegHex(io, TPI->FFSR, " FFSR", " (Formatter and Flush Status)\r\n");
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PrintRegHex(io, TPI->FFCR, " FFSR", " (Formatter and Flush Control)\r\n");
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PrintRegHex(io, TPI->PSCR, " PSCR", " (Periodic Synchronization Control)\r\n");
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PrintRegHex(io, TPI->TRIGGER, " TRIGGER", " (Trigger)\r\n");
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PrintRegHex(io, TPI->ITFTTD0, " ITFTTD0", " (Integration Test FIFO Test Data 0)\r\n");
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PrintRegHex(io, TPI->ITATBCTR2, " ITATBCTR2", " (Integration Test ATB Control 2)\r\n");
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PrintRegHex(io, TPI->ITATBCTR0, " ITATBCTR0", " (Integration Test ATB Control 0)\r\n");
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PrintRegHex(io, TPI->ITFTTD1, " ITFTTD1", " (Integration Test FIFO Test Data 1)\r\n");
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PrintRegHex(io, TPI->ITCTRL, " ITCTRL", " (Integration Mode Control)\r\n");
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PrintRegHex(io, TPI->CLAIMSET, " CLAIMSET", " (Claim tag set)\r\n");
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PrintRegHex(io, TPI->CLAIMCLR, " CLAIMCLR", " (Claim tag clear)\r\n");
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PrintRegHex(io, TPI->DEVID, " DEVID", " (Device Configuration)\r\n");
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PrintRegHex(io, TPI->DEVTYPE, " DEVTYPE", " (Device Type Identifier)\r\n");
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return ERR_OK;
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}
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static uint8_t PrintHelp(McuShell_ConstStdIOType *io) {
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McuShell_SendHelpStr((unsigned char*)"McuSWO", (const unsigned char*)"Group of McuSWO commands\r\n", io->stdOut);
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McuShell_SendHelpStr((unsigned char*)" help|status", (const unsigned char*)"Print help or status information\r\n", io->stdOut);
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McuShell_SendHelpStr((unsigned char*)" baud <baud> [clockHz]", (const unsigned char*)"Set baud based on optional clock speed\r\n", io->stdOut);
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McuShell_SendHelpStr((unsigned char*)" send <str>", (const unsigned char*)"Send string\r\n", io->stdOut);
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return ERR_OK;
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}
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uint8_t McuSWO_ParseCommand(const uint8_t *cmd, bool *handled, McuShell_ConstStdIOType *io) {
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const unsigned char *p;
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if (McuUtility_strcmp((char*)cmd, McuShell_CMD_HELP)==0 || McuUtility_strcmp((char*)cmd, "McuSWO help")==0) {
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*handled = TRUE;
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return PrintHelp(io);
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} else if ((McuUtility_strcmp((char*)cmd, McuShell_CMD_STATUS)==0) || (McuUtility_strcmp((char*)cmd, "McuSWO status")==0)) {
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*handled = TRUE;
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return PrintStatus(io);
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} else if (McuUtility_strncmp((char*)cmd, "McuSWO baud ", sizeof("McuSWO baud ")-1)==0) {
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int32_t val = 0;
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uint32_t clock = 0, baud = 0;
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*handled = TRUE;
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p = cmd + sizeof("McuSWO baud ")-1;
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if (McuUtility_xatoi(&p, &val)!=ERR_OK || val<0) {
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return ERR_FAILED;
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}
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baud = val;
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if (*p!='\0') { /* clock? */
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if (McuUtility_xatoi(&p, &val)!=ERR_OK || val<0) {
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return ERR_FAILED;
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}
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clock = val;
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} else { /* take default */
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clock = SWO_traceClock;
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}
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SetSWOSpeed(clock, baud);
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} else if (McuUtility_strncmp((char*)cmd, "McuSWO send ", sizeof("McuSWO send ")-1)==0) {
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*handled = TRUE;
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p = cmd + sizeof("McuSWO send ")-1;
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PrintString(p, McuSWO_CONFIG_TERMINAL_CHANNEL);
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PrintString((unsigned char*)"\r\n", McuSWO_CONFIG_TERMINAL_CHANNEL);
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}
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return ERR_OK; /* no error */
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}
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/*!
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* \brief Initialize the SWO trace port for debug message printing
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* \param portBits Port bit mask to be configured
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* \param cpuCoreFreqHz CPU core clock frequency in Hz
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*/
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static void Init(uint32_t portBits, uint32_t traceClockHz, uint32_t SWOSpeed) {
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/* Enables the clock for the I/O controller: Enable Clock. */
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MuxSWOPin();
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/*!< Set up dividers */
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CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Set AHBCLKDIV divider to value 1 */
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CLOCK_SetClkDiv(kCLOCK_DivArmTrClkDiv, 0U, true); /*!< Reset TRACECLKDIV divider counter and halt it */
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CLOCK_SetClkDiv(kCLOCK_DivArmTrClkDiv, 1U, false); /*!< Set TRACECLKDIV divider to value 1 */
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/*!< Switch TRACE to TRACE_DIV */
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CLOCK_AttachClk(kTRACE_DIV_to_TRACE);
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CoreDebug->DEMCR = CoreDebug_DEMCR_TRCENA_Msk; /* enable trace in core debug */
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TPI->SPPR = 0x2; /* "Selected PIN Protocol Register": Select which protocol to use for trace output (2: SWO NRZ (UART), 1: SWO Manchester encoding) */
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SetSWOSpeed(traceClockHz, SWOSpeed); /* set baud rate */
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ITM->LAR = 0xC5ACCE55; /* ITM Lock Access Register, C5ACCE55 enables more write access to Control Register 0xE00 :: 0xFFC */
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/* enable trace with the TCR: this includes DWT and ITM packets to be sent */
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ITM->TCR = ITM_TCR_DWTENA_Msk | ITM_TCR_ITMENA_Msk | ITM_TCR_TRACEBUSID_Msk | ITM_TCR_SWOENA_Msk | ITM_TCR_SYNCENA_Msk; /* ITM Trace Control Register */
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ITM->TPR = ITM_TPR_PRIVMASK_Msk; /* ITM Trace Privilege Register */
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ITM->TER = portBits; /* ITM Trace Enable Register. Enabled tracing on stimulus ports. One bit per stimulus port. */
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DWT->CTRL = /* see https://interrupt.memfault.com/blog/profiling-firmware-on-cortex-m#enabling-pc-sampling-with-itm-and-openocd */
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( 4<<DWT_CTRL_NUMCOMP_Pos) /* 4 bits */
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#if McuSWO_CONFIG_PC_SAMPLING
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| ( 1<<DWT_CTRL_PCSAMPLENA_Pos) /* 1 bit: enable PC sampling */
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#endif
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| ( 0<<DWT_CTRL_SYNCTAP_Pos) /* 2 bits */
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| ( 1<<DWT_CTRL_CYCTAP_Pos) /* 1 bits: This selects which bit in the cycle counter is used to trigger PC sampling events. A 1 selects bit 10 to tap, a 0 selects bit 6 to tap. */
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| (0xF<<DWT_CTRL_POSTINIT_Pos) /* 4 bits */
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| (0xF<<DWT_CTRL_POSTPRESET_Pos) /* 4 bits: These bits control how many times the time bit must toggle before a PC sample event is generated. */
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#if McuWait_CONFIG_USE_CYCLE_COUNTER || McuSWO_CONFIG_PC_SAMPLING
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| ( 1<<DWT_CTRL_CYCCNTENA_Pos) /* 1 bit: enable CYCCNT which is required for PC sampling */
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#endif
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;
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TPI->FFCR = (1<<TPI_FFCR_TrigIn_Pos); /* Formatter and Flush Control Register */
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}
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void McuSWO_ChangeSpeed(uint32_t baud) {
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SetSWOSpeed(SWO_traceClock, baud);
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}
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void McuSWO_Init(uint32_t traceClock, uint32_t baud) {
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SWO_traceClock = traceClock; /* just the default! */
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Init(1, SWO_traceClock, baud);
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}
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#endif /* McuSWO_CONFIG_HAS_SWO */
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