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83 lines
3.1 KiB
83 lines
3.1 KiB
/*
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* Copyright (c) 2022, Erich Styger
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef MCUSPICONFIG_H_
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#define MCUSPICONFIG_H_
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/* different hardware pre-configurations */
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#define MCUSPI_CONFIG_HW_TEMPLATE_NONE 0
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#define MCUSPI_CONFIG_HW_TEMPLATE_KINETIS_K22_SPI1 1
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#define MCUSPI_CONFIG_HW_TEMPLATE_LPC55S16_FC3 2
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#define MCUSPI_CONFIG_HW_TEMPLATE_LPC55S59_FC8 3
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/* NOTE: Pin muxing for the MISO/MOSI/CLK has to be done in the pins tool! */
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#ifndef MCUSPI_CONFIG_HW_TEMPLATE
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#define MCUSPI_CONFIG_HW_TEMPLATE MCUSPI_CONFIG_HW_TEMPLATE_NONE
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#endif
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#if MCUSPI_CONFIG_HW_TEMPLATE==MCUSPI_CONFIG_HW_TEMPLATE_KINETIS_K22_SPI1
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#define MCUSPI_CONFIG_HW_SPI_MASTER SPI1
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#define MCUSPI_CONFIG_HW_SPI_MASTER_CLK_SRC DSPI1_CLK_SRC
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#define MCUSPI_CONFIG_HW_SPI_MASTER_CLK_FREQ CLOCK_GetFreq(DSPI1_CLK_SRC)
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#define MCUSPI_CONFIG_HW_SPI_MASTER_PCS_FOR_INIT kDSPI_Pcs1
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#define MCUSPI_CONFIG_HW_SPI_MASTER_PCS_FOR_TRANSFER kDSPI_MasterPcs1
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#define MCUSPI_CONFIG_HW_CS_GPIO GPIOB
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#define MCUSPI_CONFIG_HW_CS_PORT PORTB
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#define MCUSPI_CONFIG_HW_CS_PIN 18
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#define MCUSPI_CONFIG_HW_CS_INIT() \
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CLOCK_EnableClock(kCLOCK_PortB);
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#elif MCUSPI_CONFIG_HW_TEMPLATE==MCUSPI_CONFIG_HW_TEMPLATE_LPC55S16_FC3
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/* FC3_SPI_SCK, P0_6
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* FC3_SPI_SSEL0, P0_4
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* FC3_SPI_MOSI, P0_3
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* FC3_SPI_MISO, P0_2
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*/
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#define MCUSPI_CONFIG_HW_SPI_MASTER SPI3
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#define MCUSPI_CONFIG_HW_SPI_MASTER_IRQ FLEXCOMM3_IRQn
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#define MCUSPI_CONFIG_HW_SPI_MASTER_CLK_SRC kCLOCK_Flexcomm3
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#define MCUSPI_CONFIG_HW_SPI_MASTER_CLK_FREQ CLOCK_GetFlexCommClkFreq(3U)
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#define MCUSPI_CONFIG_HW_SPI_SSEL 1
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#define MCUSPI_CONFIG_HW_SPI_SPOL kSPI_SpolActiveAllLow
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#define MCUSPI_CONFIG_HW_SPI_INIT() \
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CLOCK_AttachClk(kFRO12M_to_FLEXCOMM7); /* attach 12 MHz clock to SPI3 */ \
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RESET_PeripheralReset(kFC7_RST_SHIFT_RSTn); /* reset FLEXCOMM for SPI */
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#define MCUSPI_CONFIG_HW_CS_GPIO GPIO
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#define MCUSPI_CONFIG_HW_CS_PORT 0
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#define MCUSPI_CONFIG_HW_CS_PIN 4
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#define MCUSPI_CONFIG_HW_CS_INIT() /* noting */
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#elif MCUSPI_CONFIG_HW_TEMPLATE==MCUSPI_CONFIG_HW_TEMPLATE_LPC55S59_FC8
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#define MCUSPI_CONFIG_HW_SPI_MASTER SPI8
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#define MCUSPI_CONFIG_HW_SPI_MASTER_IRQ FLEXCOMM8_IRQn
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#define MCUSPI_CONFIG_HW_SPI_MASTER_CLK_SRC kCLOCK_Flexcomm8
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#define MCUSPI_CONFIG_HW_SPI_MASTER_CLK_FREQ CLOCK_GetFlexCommClkFreq(8U)
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#define MCUSPI_CONFIG_HW_SPI_SSEL 1
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#define MCUSPI_CONFIG_HW_SPI_SPOL kSPI_SpolActiveAllLow
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#define MCUSPI_CONFIG_HW_SPI_INIT() \
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CLOCK_AttachClk(kFRO12M_to_FLEXCOMM8); /* attach 12 MHz clock to SPI8 */ \
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RESET_PeripheralReset(kFC8_RST_SHIFT_RSTn); /* reset FLEXCOMM for SPI */
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#define MCUSPI_CONFIG_HW_CS_GPIO GPIO
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#define MCUSPI_CONFIG_HW_CS_PORT 0
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#define MCUSPI_CONFIG_HW_CS_PIN 4
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#define MCUSPI_CONFIG_HW_CS_INIT() /* noting */
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#endif /* MCUSPI_CONFIG_HW_TEMPLATE */
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#ifndef MCUSPI_CONFIG_TRANSFER_BAUDRATE
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#define MCUSPI_CONFIG_TRANSFER_BAUDRATE 500000U /*! Transfer baudrate - 500k */
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#endif
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#endif /* MCUSPICONFIG_H_ */
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