diff --git a/ADIS_tinyK22_SplitFlap/ADIS_tinyK22_SplitFlap.mex b/ADIS_tinyK22_SplitFlap/ADIS_tinyK22_SplitFlap.mex
index 9d0707e..048945d 100644
--- a/ADIS_tinyK22_SplitFlap/ADIS_tinyK22_SplitFlap.mex
+++ b/ADIS_tinyK22_SplitFlap/ADIS_tinyK22_SplitFlap.mex
@@ -26,6 +26,8 @@
12.0.0
+
+
@@ -37,13 +39,39 @@
true
+
+
+ true
+
+
true
+
+
+ true
+
+
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/ADIS_tinyK22_SplitFlap/board/pin_mux.c b/ADIS_tinyK22_SplitFlap/board/pin_mux.c
index 7253568..d6c8d5c 100644
--- a/ADIS_tinyK22_SplitFlap/board/pin_mux.c
+++ b/ADIS_tinyK22_SplitFlap/board/pin_mux.c
@@ -14,11 +14,14 @@ mcu_data: ksdk2_0
processor_version: 12.0.0
pin_labels:
- {pin_num: '45', pin_signal: ADC0_SE4b/CMP1_IN0/PTC2/SPI0_PCS2/UART1_CTS_b/FTM0_CH1/FB_AD12/I2S0_TX_FS/LPUART0_CTS_b, label: LED_BLUE, identifier: LED_BLUE}
+- {pin_num: '46', pin_signal: CMP1_IN1/PTC3/LLWU_P7/SPI0_PCS1/UART1_RX/FTM0_CH2/CLKOUT/I2S0_TX_BCLK/LPUART0_RX, label: UART1_RX, identifier: UART1_RX}
+- {pin_num: '49', pin_signal: PTC4/LLWU_P8/SPI0_PCS0/UART1_TX/FTM0_CH3/FB_AD11/CMP1_OUT/LPUART0_TX, label: UART1_TX, identifier: UART1_TX}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* clang-format on */
#include "fsl_common.h"
+#include "fsl_port.h"
#include "pin_mux.h"
/* FUNCTION ************************************************************************************************************
@@ -37,7 +40,11 @@ void BOARD_InitBootPins(void)
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitPins:
- options: {callFromInitBoot: 'true', coreID: core0, enableClock: 'true'}
-- pin_list: []
+- pin_list:
+ - {pin_num: '46', peripheral: UART1, signal: RX, pin_signal: CMP1_IN1/PTC3/LLWU_P7/SPI0_PCS1/UART1_RX/FTM0_CH2/CLKOUT/I2S0_TX_BCLK/LPUART0_RX, open_drain: enable,
+ pull_select: up, pull_enable: enable}
+ - {pin_num: '49', peripheral: UART1, signal: TX, pin_signal: PTC4/LLWU_P8/SPI0_PCS0/UART1_TX/FTM0_CH3/FB_AD11/CMP1_OUT/LPUART0_TX, direction: OUTPUT, open_drain: enable,
+ pull_select: up, pull_enable: enable}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* clang-format on */
@@ -50,6 +57,45 @@ BOARD_InitPins:
* END ****************************************************************************************************************/
void BOARD_InitPins(void)
{
+ /* Port C Clock Gate Control: Clock enabled */
+ CLOCK_EnableClock(kCLOCK_PortC);
+
+ /* PORTC3 (pin 46) is configured as UART1_RX */
+ PORT_SetPinMux(BOARD_INITPINS_UART1_RX_PORT, BOARD_INITPINS_UART1_RX_PIN, kPORT_MuxAlt3);
+
+ PORTC->PCR[3] = ((PORTC->PCR[3] &
+ /* Mask bits to zero which are setting */
+ (~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_ODE_MASK | PORT_PCR_ISF_MASK)))
+
+ /* Pull Select: Internal pullup resistor is enabled on the corresponding pin, if the
+ * corresponding PE field is set. */
+ | (uint32_t)(kPORT_PullUp)
+
+ /* Open Drain Enable: Open drain output is enabled on the corresponding pin, if the pin is
+ * configured as a digital output. */
+ | PORT_PCR_ODE(kPORT_OpenDrainEnable));
+
+ /* PORTC4 (pin 49) is configured as UART1_TX */
+ PORT_SetPinMux(BOARD_INITPINS_UART1_TX_PORT, BOARD_INITPINS_UART1_TX_PIN, kPORT_MuxAlt3);
+
+ PORTC->PCR[4] = ((PORTC->PCR[4] &
+ /* Mask bits to zero which are setting */
+ (~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_ODE_MASK | PORT_PCR_ISF_MASK)))
+
+ /* Pull Select: Internal pullup resistor is enabled on the corresponding pin, if the
+ * corresponding PE field is set. */
+ | (uint32_t)(kPORT_PullUp)
+
+ /* Open Drain Enable: Open drain output is enabled on the corresponding pin, if the pin is
+ * configured as a digital output. */
+ | PORT_PCR_ODE(kPORT_OpenDrainEnable));
+
+ SIM->SOPT5 = ((SIM->SOPT5 &
+ /* Mask bits to zero which are setting */
+ (~(SIM_SOPT5_UART1TXSRC_MASK)))
+
+ /* UART 1 transmit data source select: UART1_TX pin. */
+ | SIM_SOPT5_UART1TXSRC(SOPT5_UART1TXSRC_UART_TX));
}
/***********************************************************************************************************************
* EOF
diff --git a/ADIS_tinyK22_SplitFlap/board/pin_mux.h b/ADIS_tinyK22_SplitFlap/board/pin_mux.h
index 598ae8e..c7d3ba0 100644
--- a/ADIS_tinyK22_SplitFlap/board/pin_mux.h
+++ b/ADIS_tinyK22_SplitFlap/board/pin_mux.h
@@ -25,6 +25,26 @@ extern "C" {
*/
void BOARD_InitBootPins(void);
+#define SOPT5_UART1TXSRC_UART_TX 0x00u /*!<@brief UART 1 transmit data source select: UART1_TX pin */
+
+/*! @name PORTC3 (number 46), UART1_RX
+ @{ */
+
+/* Symbols to be used with PORT driver */
+#define BOARD_INITPINS_UART1_RX_PORT PORTC /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITPINS_UART1_RX_PIN 3U /*!<@brief PORT pin number */
+#define BOARD_INITPINS_UART1_RX_PIN_MASK (1U << 3U) /*!<@brief PORT pin mask */
+ /* @} */
+
+/*! @name PORTC4 (number 49), UART1_TX
+ @{ */
+
+/* Symbols to be used with PORT driver */
+#define BOARD_INITPINS_UART1_TX_PORT PORTC /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITPINS_UART1_TX_PIN 4U /*!<@brief PORT pin number */
+#define BOARD_INITPINS_UART1_TX_PIN_MASK (1U << 4U) /*!<@brief PORT pin mask */
+ /* @} */
+
/*!
* @brief Configures pin routing and optionally pin electrical features.
*
diff --git a/ADIS_tinyK22_SplitFlap/source/application.c b/ADIS_tinyK22_SplitFlap/source/application.c
index e650d6e..47368b6 100644
--- a/ADIS_tinyK22_SplitFlap/source/application.c
+++ b/ADIS_tinyK22_SplitFlap/source/application.c
@@ -82,7 +82,7 @@ void App_Run(void){
}
// go through the following letters
- char* letters[] = {"J", "O", "N", "A", "S", "!"};
+ char* letters[] = {"S", "E", "N", "D", " ", "N","U","D","E","S","!"};
//char* letters[] = { " ", "A", "B", "C", "D", "E", "F", "G", "H", "I", "J", "K",
// "L", "M", "N", "O", "P", "Q", "R", "S", "T", "U", "V", "W", "X", "Y", "Z",
// "0", "1", "2", "3", "4", "5", "6", "7", "8", "9",
diff --git a/ADIS_tinyK22_SplitFlap/source/communication/uart1.c b/ADIS_tinyK22_SplitFlap/source/communication/uart1.c
new file mode 100644
index 0000000..3fb9780
--- /dev/null
+++ b/ADIS_tinyK22_SplitFlap/source/communication/uart1.c
@@ -0,0 +1,8 @@
+/*
+ * uart1.c
+ *
+ * Created on: 7 Oct 2022
+ * Author: simon
+ */
+
+
diff --git a/ADIS_tinyK22_SplitFlap/source/communication/uart1.h b/ADIS_tinyK22_SplitFlap/source/communication/uart1.h
new file mode 100644
index 0000000..108e646
--- /dev/null
+++ b/ADIS_tinyK22_SplitFlap/source/communication/uart1.h
@@ -0,0 +1,13 @@
+/*
+ * uart1.h
+ *
+ * Created on: 7 Oct 2022
+ * Author: simon
+ */
+
+#ifndef COMMUNICATION_UART1_H_
+#define COMMUNICATION_UART1_H_
+
+
+
+#endif /* COMMUNICATION_UART1_H_ */